Searcher for multiple orthogonal channels with known data wcdma step2 search

ABSTRACT

A circuit and algorithm are disclosed for a step2 search of a three step search of synchronization channels in a W-CDMA system. A mobile terminal of the CDMA system includes an RF downconverter for receiving I and Q signals. A searcher, responsive to the I and Q signals, includes a first correlator for correlating the I and Q signals with a primary synchronization code on a primary synchronization channel, and a second correlator for correlating I and Q signals with a secondary synchronization code on a secondary synchronization channel. The correlated I and Q signals are added for each of the secondary synchronization codes. An energy calculator and a maximum energy detector use the correlated I and Q signals of both the primary and secondary synchronization channels to detect the most likely scrambling code group of secondary synchronization codes.

FIELD OF DISCLOSURE

The present invention relates generally to CDMA communications systems,and more specifically to an improved method and apparatus for step2W-CDMA searching.

BACKGROUND

Wireless communication systems provide various types of communicationsuch as voice, data, video and the like. These systems are based ondifferent modulations techniques such as code division multiple access(CDMA), time division multiple access (TDMA), etc. A CDMA systemprovides certain advantages over other types of systems, includingincreased system capacity.

A CDMA system may be designed to support one or more CDMA standards suchas (1) the “TIA/EIA-95-B Mobile Station-Base Station CompatibilityStandard for Dual-Mode Wideband Spread Spectrum Cellular System” (theIS-95 standard), (2) the standard offered by a consortium named “3rdGeneration Partnership Project” (3GPP) and embodied in a set ofdocuments including Document Nos. 3G TS 25.211, 3G TS 25.212, 3G TS25.213, and 3G TS 25.214 (the W-CDMA standard), (3) the standard offeredby a consortium named “3rd Generation Partnership Project 2” (3GPP2) andembodied in a set of documents including “C.S0002-A Physical LayerStandard for cdma2000 Spread Spectrum Systems,” the “C.S0005-A UpperLayer (Layer 3) Signaling Standard for cdma2000 Spread SpectrumSystems,” and the “C.S0024 cdma2000 High Rate Packet Data Air InterfaceSpecification” (the cdma2000 standard), and (4) some other standards.

Pseudorandom noise (PN) sequences are commonly used in CDMA systems forspreading transmitted data, including transmitted pilot signals. Thetime required to transmit a single value of the PN sequence is known asa chip, and the rate at which the chips vary is known as the chip rate.CDMA receivers commonly employ RAKE receivers. A rake receiver istypically made up of one or more searchers for locating direct andmultipath pilots from one or more base stations, and two or moremultipath demodulators (fingers) for receiving and combining informationsignals from those base stations.

Inherent in the design of direct sequence CDMA systems is therequirement that a receiver must align its PN sequences to those of abase station. Some systems, such as those defined by the W-CDMAstandard, differentiate base stations using a unique PN code for each,known as a primary scrambling code. The W-CDMA standard defines two Goldcode sequences for scrambling the downlink, one for the in-phasecomponent (I) and another for the quadrature (Q). The I and Q PNsequences together are broadcast throughout the cell without datamodulation. This broadcast is referred to as the common pilot channel(CPICH). The PN sequences generated are truncated to a length of 38,400chips. The period of 38,400 chips is referred to as a radio frame. Eachradio frame is divided into 15 equal sections referred to as slots.W-CDMA base stations operate asynchronously in relation to each other,so knowledge of the frame timing of one base station does not translateinto knowledge of the frame timing of any other base station. In orderto acquire this knowledge, W-CDMA systems require synchronizationchannels and a cell searching technique.

Referring now to FIG. 1, a chart illustrates the various synchronizationchannels utilized in a W-CDMA system to perform synchronization. Thesechannels include a Primary Synchronization Channel (Primary SCH) whichis coded with a Primary Synchronization Code (PSC). The purpose of thePSC is to provide slot timing. There is also a Secondary SynchronizationChannel (Secondary SCH) which is coded with one of 16 possible SecondarySynchronization Codes (SSC) per slot. A length 15-SSC sequenceidentifies the code group and frame timing. There is also the CommonPilot channel (CPICH) which is scrambled with primary scrambling codes.The CPICH is utilized to obtain the primary scrambling code. From FIG.1, it can be appreciated that Primary SCH and the Secondary SCH aredivided into 15 slots numbered Slot 0 through Slot 14, and that eachslot is 2560 chips. Both the PSC and the SSC are 256 chips longs. Thereis also a Primary Common Control Physical Channel (PCCPCH) within acell, and it is used to carry synchronization and broadcast informationfor users. The Primary CCPCH is not transmitted during the first 256chips of each slot. Instead, the Primary SCH and Secondary SCH aretransmitted during this period, the remainder being used for broadcastmessages.

It is possible to search for W-CDMA base stations offset by offset(38,400 of them) for each of the 512 primary codes. However, this is notpractical due to the excessive amount of time such a search wouldrequire. Instead, the W-CDMA standard calls for base stations totransmit the Primary SCH and the Secondary SCH, to assist the mobileterminal in searching efficiently. As a result, a W-CDMA cell search canbe performed in three steps.

For initial acquisition, the three-step W-CDMA search technique providesa substantial performance increase, in terms of reduced search time,over the impractical alternative of searching the entire PN space foreach scrambling code. Probability of detection and search time areimportant metrics in determining the quality of a CDMA system. Decreasedsearch time or higher probability of detection implies that searches canbe done faster or less often. As such, a subscriber unit can locate andaccess the best available cell faster or more reliably using less power,resulting in better signal transmission and reception, often at reducedtransmission power levels by both the base station and the subscriberunit. This, in turn, increases the capacity of the CDMA system (eitherin terms of support for an increased number of users, or highertransmission rates, or both). Furthermore, decreased search time is alsoadvantageous when a subscriber unit is in idle mode, a low-power statewhere a subscriber unit is not actively transmitting or receiving voiceor data, but is periodically monitoring the system. Reduced search timeallows the subscriber unit to spend more time in the low power state,thus reducing power consumption and increasing standby time.

In a conventional three step cell searching technique, step2 isperformed using only the SSC signal. One such cell searching techniqueis described in U.S. Pat. No. 6,768,768, by Rao, et al., entitled“Method and apparatus for step two W-CDMA searching”, which isincorporated herein by reference in its entirety and which assigned tothe assignee of the present application. The '768 patent disclosesseveral embodiments for improving the second searching step. In oneembodiment of the '768 patent, a plurality of codes or SSCs, arecorrelated with a received signal at a plurality of offsets to produce acode/slot energy corresponding to each code/slot boundary pair. Uniquesubsets of the code/slot energies are summed to produce code sequenceenergies, the maximum of which indicates a located code sequence andslot boundary. In another embodiment of the '768 patent, the correlationis performed by sub-correlating the received signal with a commonsequence, and performing a Fast Hadamard Transform (FHT) on the results.In yet another embodiment, one sub-correlator can be used to search aplurality of peaks simultaneously.

Referring now to FIG. 2, a block diagram illustrates the hardware of theRao '768 patent for performing one of the conventional step2 searchalgorithms. FIG. 1 depicts a searcher 430 having I and Q samples whichenter correlator 510, where they are correlated with each of the sixteenSSCs. The correlator 510 contains sub-correlator 520, FHT 530, andenergy calculator 535. Sub-correlator 520 produces a length-16sub-correlation sequence for delivery to FHT 530. The results of thecorrelator 510 are stored in memory 540. The energy results for multipleframes may be accumulated and stored in memory 540. Summer 550 readsSSC/slot energy values out of memory 540 according to a predeterminedSSC sequence for each slot hypothesis. The SSC/slot energies are addedto produce a SSC sequence energy. The SSC sequence energies aredelivered to maximum energy detector 560 for detection of the maximumenergy, which corresponds to the most likely scrambling code group andframe timing. Summer 550 and maximum energy detector 560 may be combinedin one circuit, or the functions of both can be carried out in a DSP.

Another cell searching technique is described in an article by Y.-P. EWang, T. Ottosson, which is entitled “Cell search in W-CDMA”, IEEEJournal on Selected Areas in Communications, Vol 18, Issue 8, August2000, page 1470-1482, which is incorporated herein in its entirety. Inthis technique, the authors proposed a coherent detection method, usingthe phase of PSC correlation to correct the phase of SSC correlation.The idea is that the random phase φ_(k) can be estimated using PSCcorrelation. This estimated phase can then be used to phase-correct theSSC correlation.

W-CDMA searchers designed to reduce search time will improve the speedand performance of the mobile terminal. In addition, however, efficiencyof implementation is also important to reduce integrated circuit areaand power consumption. Step 2 of the three step search method describedabove is a complex procedure, and there is therefore a need in the artfor efficient searchers that can perform step2 W-CDMA searching.

SUMMARY

Exemplary embodiments of the invention are directed to systems andmethod for step2 W-CDMA searching.

Accordingly, an embodiment of the invention can include a method forsearching for a secondary synchronization code, the method comprising:correlating both a primary synchronization channel and a secondarysynchronization channel; obtaining a first estimate that is a functionof the primary synchronization channel and secondary synchronizationchannel, for a correct secondary synchronization code; and obtaining asecond estimate that is a function of the primary synchronizationchannel for an incorrect secondary synchronization code.

Another embodiment can include a circuit for performing a search of thesynchronization channels in a CDMA system, including at least a primarysynchronization channel and a secondary synchronization channel,comprising: a correlator to perform the correlation of I and Q signalswith the primary synchronization code and the secondary synchronizationcode; an energy calculator responsive to the output of the correlator;and a maximum energy detector, responsive to the energy calculator, fordetecting the most likely scrambling code group of secondarysynchronization codes.

Another embodiment can include a mobile terminal in a WCDMA system,comprising: an RF downconverter for receiving I and Q signals; asearcher, responsive to the I and Q signals, including: a firstcorrelator for correlating I and Q signals with a primarysynchronization code; a second correlator for correlating I and Qsignals with a secondary synchronization code; a first adder for addingthe correlated signals I and Q signals from the first correlator and thesecond correlator, for each of the secondary synchronization codes; anenergy calculator responsive to the output of the first adder; and amaximum energy detector, responsive to the energy calculator, fordetecting the most likely scrambling code group of secondarysynchronization codes.

Another embodiment can include a circuit for performing a search of thesynchronization channels in a WCDMA system, including at least a primarysynchronization channel and a secondary synchronization channel,comprising: correlator means for performing the correlation of I and Qsignals with the primary synchronization code and the secondarysynchronization code; means for performing an energy calculation inresponse to the output of the correlator means; and means for detectingthe maximum energy in order to determine the most likely scrambling codegroup of secondary synchronization codes.

Another embodiment can include a circuit for performing a search of thesynchronization channels in a WCDMA system, including at least a primarysynchronization channel and a secondary synchronization channel,comprising: means for adding primary synchronization code and secondarysynchronization code inputs; correlator means for performing thecorrelation of I and Q signals with the added primary synchronizationcode and the secondary synchronization code inputs; means for performingan energy calculation in response to the output of the correlator means;and means for detecting the maximum energy in order to determine themost likely scrambling code group of secondary synchronization codes.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are presented to aid in the description ofembodiments of the invention and are provided solely for illustration ofthe embodiments and not limitation thereof.

FIG. 1 is a chart which illustrates the various synchronization channelsin a W-CDMA system.

FIG. 2 is a block diagram of hardware for performing the conventionalstep2 search algorithm.

FIG. 3 is a block diagram of a wireless device for performing the novelstep2 search algorithm.

FIG. 4A is a block diagram of a generalized algorithm for performing thenovel step2 search algorithm.

FIG. 4B is a block diagram of an alternative algorithm for performingthe novel step2 search algorithm.

FIG. 5 is a block diagram of hardware for performing the novel step2search algorithm.

FIG. 6 is a graph that illustrates the performance of various algorithmsunder AWGN (“Additive White Gaussian Noise”) with no frequency error.

FIG. 7 is a graph that illustrates the performance of various algorithmsunder AWGN with −3.6 kHz frequency error.

FIG. 8 is a graph that illustrates the performance of various algorithmsin a single path high speed fading scenario.

FIG. 9 is a graph that illustrates the performance of a novel algorithmwith different accumulation lengths (3, 2, 1 frames) to prior artalgorithms under AWGN.

FIG. 10 is a graph that illustrates the performance of variousalgorithms under AWGN, with frequency error and variable accumulationlength.

FIG. 11 is a graph that illustrates the performance of variousalgorithms under single path, high speed fading and variableaccumulation length.

DETAILED DESCRIPTION

Aspects of the invention are disclosed in the following description andrelated drawings directed to specific embodiments of the invention.Alternate embodiments may be devised without departing from the scope ofthe invention. Additionally, well-known elements of the invention willnot be described in detail or will be omitted so as not to obscure therelevant details of the invention.

The word “exemplary” is used herein to mean “serving as an example,instance, or illustration.” Any embodiment described herein as“exemplary” is not necessarily to be construed as preferred oradvantageous over other embodiments. Likewise, the term “embodiments ofthe invention” does not require that all embodiments of the inventioninclude the discussed feature, advantage or mode of operation.

Further, many embodiments are described in terms of sequences of actionsto be performed by, for example, elements of a computing device. It willbe recognized that various actions described herein can be performed byspecific circuits (e.g., application specific integrated circuits(ASICs)), by program instructions being executed by one or moreprocessors, or by a combination of both. Additionally, these sequence ofactions described herein can be considered to be embodied entirelywithin any form of computer readable storage medium having storedtherein a corresponding set of computer instructions that upon executionwould cause an associated processor to perform the functionalitydescribed herein. Thus, the various aspects of the invention may beembodied in a number of different forms, all of which have beencontemplated to be within the scope of the claimed subject matter. Inaddition, for each of the embodiments described herein, thecorresponding form of any such embodiments may be described herein as,for example, “logic configured to” perform the described action.

Listed below is a glossary of acronyms and symbols utilized in thisspecification:

AWGN—Additive white Gaussian noisebpg—Block Processing Group

CD—Coherent Detection CDMA—Code Division Multiple Access

conv—conventional

CPICH—Common Pilot Channel

CSIM—A software simulation programdB—Decibel

DSP—Digital Signal Processor FHT—Fast Hadamard Transform

fe—Frequency error.

GHz—Gigahertz

H₀—Hypothesis without SignalH_(i)—Hypothesis with Signal and SSC group i

JPH—Joint Phase and Hypothesis

k—Slot numberkHz—Kilohertzkm/h—kilometers per hourMatlab®—A commercial mathematics/simulation programms—millisecondNc—Accumulation length in units of slotppm—parts per million

PSC—Primary Synchronization Code

Re—Real part

SCH—Synchronization Channel SSC—Secondary Synchronization Code

Step1—Step One of CDMA cell searchStep2—Step Two of CDMA cell searchStep3—Step Three of CDMA cell search

TDMA—Time Division Multiple Access W-CDMA—Wideband Code DivisionMultiple Access

α_(k)—Channel Gainφ_(k)—Random Phaseσ²—noise powern_(k)—The i.i.d. complex AWGN noise vectory_(k)—The first 256-chip signal received in slot number k

Embodiments of the invention include an algorithm for WCDMA cell searchstep2. The novel algorithm outperforms the conventional methods, if thesame accumulation length is used. Also, provided is a theoreticalanalysis as well as simulation results to demonstrate the performancegains. The step2 search time can be reduced from 30 ms to 20 ms and thedetection probability is increased (e.g., 10% at −9 dB geometry) evenwith the reduced search time.

Referring now to FIG. 3, a block diagram illustrates a mobile terminal300 for performing the novel step2 search algorithm of the presentinvention. Only a subset of the components of a mobile terminal unit 300are shown. Signals are received at antenna 310, and delivered to RFdownconvert block 320 for amplification, down conversion, and sampling.Various techniques for down converting CDMA signals to baseband areknown in the art. From RF downconvert block 320, I and Q samples aredelivered to searcher 330. Searcher 330 is in communication with adigital signal processor (DSP) 340. Alternatives to employing a DSPinclude using another type of general purpose processor, or specializedhardware designed for carrying out various tasks related to the novelsearch algorithm.

Embodiments of the invention assume that fading and phase are constantover one block processing group (hereinafter referred to as a “bpg”)which is a 256 chip. It is assumed the signal is present. The falsealarm scenario is described below. Denote y_(k) to be the first 256-chipsignal received in slot number k. It can be written as following:

y _(k)=α_(k)(PSC+SSC_(k,i))e ^(jφ) ^(k) +n _(k), for hypothesis H_(i)  (1)

where α_(k) is the magnitude of the channel gain, φ_(k) is the randomphase due to frequency errors, initial phase offset, and the channelgain phase. H_(i) is one of the 64×15 hypothesis (64 code groups with 15possible frame boundaries). PSC and SSC_(k,i) are the complexsynchronization code in slot k for hypothesis i. n_(k) is the i.i.d.complex AWGN noise vector with 256 elements. Each complex elementincludes a noise power of σ². Further, {right arrow over (y)}=[y₁, y₂, .. . , y_(Nc)] is defined to be the signal vector of Nc slots, where Ncis the accumulation length. Currently Nc is set to 45 (3 frames). Giveny, a determination is made regarding the most likely hypothesis.

If only SSC is used to compute the correlation. The detection criterionbecomes

H_(i)=arg max{Σ|SSC_(k,i)y_(k)*|²}  (2)

The joint phase and hypothesis estimation can be performed as follows.Define {right arrow over (φ)}=[φ₁, φ₂, . . . , φ_(Nc)] to the vector ofthe random phases. Then the conditional probability when the signal ispresent

$\begin{matrix}{{{P( {{\overset{->}{y}H_{i}},\overset{->}{\varphi}} )} = {( \frac{1}{{\pi\sigma}^{2}} )^{256N_{c}}^{- \sum\limits_{k = 1}^{N_{c}}}}}\frac{( {y_{k} - {{\alpha_{k}( {{P\; S\; C} + {S\; S\; C_{k,i}}} )}^{{j\varphi}_{k}}}} )( {y_{k} - {{\alpha_{k}( {{P\; S\; C} + {S\; S\; C_{k,i}}} )}^{{j\varphi}_{k}}}} )^{*}}{\sigma^{2}}} & (3)\end{matrix}$

Equation (3) can be further simplified to

$\begin{matrix}{{{P( {{\overset{->}{y}H_{i}},\overset{->}{\varphi}} )} = {( \frac{1}{{\pi\sigma}^{2}} )^{256N_{c}}^{- \sum\limits_{k = 1}^{N_{c}}}}}\frac{{y_{k}}^{2} + {\alpha_{k}^{2}{{{P\; S\; C} + {S\; S\; C_{k,i}}}}^{2}} - {2\alpha_{k}{{Re}( {( {{P\; S\; C} + {S\; S\; C_{k,i}}} )^{{j\varphi}_{k}}y_{k}^{*}} )}}}{\sigma^{2}}} & (4)\end{matrix}$

Now it is clear that

(H _(i), {right arrow over (φ)})=arg max{Σα_(k)Re((PSC+SSC_(k,i))e ^(jφ)^(k) y _(k)*)}  (5)

For a given H_(i), to maximize the term inside the sum, φ_(k) for eachslot k has to be chosen as

φ_(k)=−

((PSC+SSC_(k,i))y _(k)*)

Re((PSC+SSC_(k,i))e ^(jφ) ^(k) y _(k)*)=|(PSC+SSC_(k,i))y _(k)*|

Thus,

H _(i)=arg max{Σα_(k)|(PSC+SSC_(k,i))y _(k)*|}  (6)

From equation (6), a calculation of the correlation of input sampleswith PSC and with SSC, and an addition the two results for each slot canbe performed. However, the magnitude of the channel gain α_(k) is notknown. The channel gain can be estimated based on|(PSC+SSC_(k,i))y_(k)*|, which is proportional to α_(k) for the correcthypothesis. Thus, the equation (6) can be modified to be

H _(i)=arg maxΣ|(PSC+SSC_(k,i))y _(k)*|²  (7)

Equation (7) also can be considered to have another interpretation forthe correct hypothesis,

E[y _(k)(PSC+SSC_(k,i))*]=α_(k)(∥PSC∥²+∥SSC_(k,i)∥²)e ^(jφ) ^(k) . Ifthe noise is ignored the result is

|(PSC+SSC_(k,i))y _(k)*|²=α_(k)(∥PSC∥² +∥SSC _(k,i)∥²)e ^(jφ) ^(k)(PSC+SSC)y _(k)*

For the incorrect hypothesis

E[y _(k)(PSC+SSC_(k,i))*]=α_(k)(∥PSC∥²)e ^(jφ) ^(k) and then if thenoise is ignored

|(PSC+SSC_(k,i))y _(k)*|²=α_(k)(∥PSC∥²)e ^(jφ) ^(k) (PSC+SSC)y _(k)*

Thus y_(k)(PSC+SSC_(k,i))* essentially provides the estimates of thechannel gain and the phase. Furthermore, it scales the channel gain byanother factor of 2 for the correct hypothesis, since ∥PSC∥²=∥SSC∥².Accordingly, the algorithm of equation (7) performs better than thecoherent detection technique of Wang and Ottoson described above.

Note the expected value for JPH estimate under correct hypothesis is afunction of PSC and SSC.

E|(PSC+SSC_(k,i))y _(k)*|²=α_(k)²(∥PSC∥²+∥SSC_(k,i)∥²)²+(∥PSC∥²+∥SSC_(k,i)∥²)σ²

where the expected value for JPH estimate under incorrect hypothesis isonly a function of PSC:

E|(PSC+SSC_(k,i))y _(k)*|²=α_(k) ²(∥PSC∥²)²+(∥PSC∥²)σ²

This is different with the coherent detection technique of Wang andOttoson, in which the expected value for the correct hypothesis is

E[Re((y _(k)PSC*)(SSC_(k,i) y _(k)*))]=α_(k) ²∥PSC∥²∥SSC_(k,i)∥²

and the expected value for the incorrect hypothesis is

E[Re((y _(k)PSC*)(SSC_(k,i) y _(k)*))]=E[α _(k)(∥PSC∥² e ^(jφ) +n_(k)PSC*)(SSC_(k,i) n _(k)*)]=0

This is because that SSC is orthogonal to PSC.

Referring now to FIG. 4A, a block diagram illustrates a generalizedimplementation of the joint-hypothesis and phase algorithm of thepresent application. The received I/Q input is applied to a PSC+SSCcorrelator 412 which correlates the received signal. The outputs of thePSC+SSC correlator 412 are applied to an energy calculator 405 whichmakes energy calculations, and a maximum energy detector 406 detects themost likely maximum energy. FIG. 4B illustrates an alternative algorithmin which the PSC and SSC I/Q inputs are added together by an adder 413and correlated in a correlator 411 before being applied to the energycalculator 405.

An exemplary embodiment of the invention may include a circuit forperforming a search of the synchronization channels in a CDMA system,including at least a primary synchronization channel and a secondarysynchronization channel. The circuit preferably includes a correlator412 to perform the correlation of I and Q signals with the primarysynchronization code and the secondary synchronization code. An energycalculator 405 is responsive to the output of the correlator. A maximumenergy detector 406, responsive to the energy calculator 405, detectsthe most likely scrambling code group of secondary synchronizationcodes.

In another exemplary embodiment of the invention having a hybridadder-correlator, the PSC input and the SSC input are added to togetherwith an adder 413 and applied to a correlator 411. The energy calculator405 is responsive to the output of the correlator 411. The maximumenergy detector 406, responsive to the energy calculator 405, detectsthe most likely scrambling code group of secondary synchronizationcodes.

Referring now to FIG. 5, a block diagram illustrates the hardware forperforming the novel step2 search algorithm or Joint Phase-Hypothesisalgorithm which includes the channel gain estimation that is expressedby the following equation:

H _(i)=arg maxΣ|(PSC+SSC_(k,i))y _(k)*|²

To implement the Joint Phase-Hypothesis algorithm in a step2 engine, thePSC correlator 401 is needed to perform the (PSC y*) function. The PSCcorrelator 401 includes multipliers 501, 502 which separately multiplythe received I and Q inputs by the PSC signal a(i) and apply themultiplied signal to adders 503, 504 and flip-flops 505, 506. Likewise,the SSC correlator 402 performs the (SSC y*) function. The SSCcorrelator 402 includes multipliers 511, 512 which separately multiplythe received I and Q inputs by the SSC signal b(i) and apply themultiplied signal to adders 513, 514 and flip-flops 515, 516. The outputfrom the flip-flops 515, 516 is applied to despread function 517 and aFHT 403. The I and Q of the PSC correlation are added to the I and Q ofthe SSC correlation by adder 518 for each of the sixteen SSCs. The I²+Q²are calculated using the squaring functions 521, 522 and adder 523.These values from the adder 523 are then stored in the energy matrixwhich includes non-coherent (ncoh) RAM 524 and energy matrix 525. Therest of the step2 algorithm including the sorter 526 is substantiallythe same as the conventional technique.

The performances of the algorithms described above have been evaluatedand are compared based on the conditional probability of detection, andconditioned on the success of step 1. The algorithms in considerationare listed below for clarity.

1. Conventional (SSH only):

H _(i)=arg max{Σ|SSC_(k,i) y _(k)*|²}  (8)

2. Coherent Detection (CD)

H _(i)=arg maxΣRe((y _(k)PSC*)(SSC_(k,i) y _(k)*))  (9)

3. Joint Phase-Hypothesis with channel gain estimation (JPH)

H _(i)=arg maxΣ|(PSC+SSC_(k,i))y _(k)*|²  (10)

The above three algorithms have been evaluated in three scenarios: AWGNwith no frequency error, AWGN with the −3.6 kHz frequency error andsingle path high speed fading with speed of 350 km/h and no frequencyerror. The input samples were generated using a software program knownas CSIM. The algorithms were implemented in the Matlab® software programin order to read these input samples and perform the step1 and step2search.

FIG. 6 displays the performance under AWGN with no frequency error. Itcan be observed that the Coherent Detection method improves theperformance by 1.5 dB over the conventional SSC only method. The JPHalgorithm improves the performance by another 0.8 dB over the CD method,thus a 2.3 dB gain over the conventional method. FIG. 7 displays theperformance under AWGN with −3.6 kHz frequency error. The same behaviorhas been observed as in FIG. 6.

FIG. 8 displays the performance under the single path high speed fadingscenario. The performance of JPH is about 2.2 dB better than theconventional method and about 0.8 dB better than the coherent detectionmethod.

FIG. 9 compares the performance of JPH with different Nf=3,2,1 frames.(Note Nc=15*Nf). It can be seen that using JPH method, the accumulationlength can be reduced to 20 ms (2 frames) with even better performancethan the conventional method. FIGS. 10 and 11 plot the performancesunder AWGN with frequency error and high speed fading case. Similarconclusions can be reached in these two scenarios as well.

In the performance comparisons described above, it has been shown thatthe JPH method performs better than the conventional method even whenthere is zero dB channel gain and no phase error. This section explainsthis performance gain.

One can look at an even simpler scenario. Assume that there are only twoSSCs, SSC1 and SSC2. It is desired to identify which SSC is used for thebpg. Ignoring the no signal case, for a single bpg

$\begin{matrix}{y = \{ \begin{matrix}{{( {{P\; S\; C} + {S\; S\; C_{1}}} ) + n},} & H_{1} \\{{( {{P\; S\; C} + {S\; S\; C_{2}}} ) + n},} & H_{2}\end{matrix} } & (11)\end{matrix}$

A similar analysis can be performed and it can be derived that

H _(i)=arg max{Re((PSC+SSC_(i))y*)}  (12)

Assume H₁ is the correct hypothesis. Then

Re((PSC+SSC₁)y*)=Re(∥PSC∥²+∥SSC₁∥²+PSCn*+SSC₁ n*)  (13)

And

Re((PSC+SSC₂)y*)=Re(∥PSC∥²+PSCn*+SSC₂ n*)  (14)

Note PSC, SSC and n are 1 by 256 row vectors (complex). Now if equation(13) and (14) are compared, it can be realized that the ∥PSC∥²+PSCn* iscommon for both hypothesis. For the purpose of detection, this can beignored. (Note even PSCn* is an AWGN noise. But the same noise isapplied to both hypotheses.) Then equation (13) and (14) become

Re(∥SSC₁∥²+SSC₁ n*)=Re(SSC₁ y*)  (15)

Re(SSC₂ n*)=Re(SSC₂ y*)  (16)

This is equivalent to using the criterion

H _(i)=arg max{Re(SSC_(i) y*)}  (17)

In fact, the simulation as been performed and the results aresubstantially the same when using criterion (12) and (17). Now this maycreate a mistaken illusion that JPH and conventional should performsimilar under the same AWGN channel. However, note the criteria used inJPH and conventional methods are different with (12) and (17). Theircriteria can be rewritten for the single bpg case as follows:

1. Conventional (conv):

H _(i)=arg max{|SSC_(i) y*|²}

2. Joint Phase-Hypothesis with channel gain estimation (JPH)

H _(i)=arg max{|(PSC+SSC_(i))y*|²}

Both JPH and the conventional methods are suboptimal in this settingcompared with criteria (12) and (17).

Now again assume H₁ is the correct hypothesis. If a conventional methodis used:

$\begin{matrix}\begin{matrix}{{{S\; S\; C_{1}y^{*}}}^{2} = {{{{S\; S\; C_{1}}}^{2} + {S\; S\; C_{1}n^{*}}}}^{2}} \\{= {{512 + {S\; S\; C_{1}n^{*}}}}^{2}} \\{= {{512 + R_{1} + {I_{1}i}}}^{2}} \\{= {512^{2} + {1024R_{1}} + R_{1}^{2} + I_{1}^{2}}}\end{matrix} & (18) \\\begin{matrix}{{{S\; S\; C_{2}y^{*}}}^{2} = {{S\; S\; C_{2}n^{*}}}^{2}} \\{= {{R_{2} + {I_{2}i}}}^{2}} \\{= {R_{2}^{2} + I_{2}^{2}}}\end{matrix} & (19)\end{matrix}$

Note that square of the norm of SSC is 512. R₁, I₁, R₂ and I₂ are realand imaginary part of SSCn*. They are AWGN with variance 512σ²/2=β. 512is due to the square of the SSC norm. ½ is due to the 2 dimensions. Notethe original Ec/(Io-Ec) for SSC is 2/σ². One common metric we use tocompare different detection algorithms is the ratio of expected distancebetween two hypotheses over the noise standard deviation (square root ofthe noise variance). The larger the ratio, the better the detectionalgorithm. Now for conventional method, the expected distance isE|SSC₁y*|²−E|SSC₂y*|²=512². The noise contributing to the variance forthe correct hypothesis (18) is 1024R₁+R₁ ²+I₁ ² and for the incorrecthypothesis (19) is R₂ ²+I₂ ². The variance of these two terms can befurther calculated to be 1024²β+4β² for (18) and 4β² for (19).

Now if the JPH method is used:

$\begin{matrix}\begin{matrix}{{{( {{P\; S\; C} + {S\; S\; C_{1}}} )y^{*}}}^{2} = {{{{P\; S\; C}}^{2} + {{S\; S\; C_{1}}}^{2} + {P\; S\; C\; n^{*}} + {S\; S\; C_{1}n^{*}}}}^{2}} \\{= {{1024 + R_{p} + R_{1} + {( {I_{p} + I_{1}} )i}}}^{2}} \\{= {1024^{2} + {2048R_{p}} + {2048R_{1}} +}} \\{{{2R_{p}R_{1}} + R_{p}^{2} + R_{1}^{2} + I_{p}^{2} + I_{1}^{2} + {2I_{p}I_{1}}}}\end{matrix} & (20) \\\begin{matrix}{{{( {{P\; S\; C} + {S\; S\; C_{2}}} )y^{*}}}^{2} = {{{{P\; S\; C}}^{2} + {P\; S\; C\; n^{*}} + {S\; S\; C_{2}n^{*}}}}^{2}} \\{= {{512 + R_{p} + R_{2} + {( {I_{p} + I_{2}} )i}}}^{2}} \\{= {512^{2} + {1024R_{p}} + {1024R_{2}} +}} \\{{{2R_{p}R_{2}} + R_{p}^{2} + R_{2}^{2} + I_{p}^{2} + I_{2}^{2} + {2I_{p}I_{2}}}}\end{matrix} & (21)\end{matrix}$

R_(p) and I_(p) are the real and imaginary part of PSCn*. They are againAWGN with variance β. Comparing (20) and (21), the expected distance is3*512̂2, thus a factor of 3 increase.

Now we can to determine whether the variance increases by a factor of 9.The noise contributing to the variance for the correct hypothesis (20)is 1024R_(p)+2048R₁+2R_(p)R₁+R₁ ²+I₁ ²+2I_(p)I₁. This is because1024R_(p)+R_(p) ²+I_(p) ² is common for all hypotheses and does notcontribute to the variance for detection purpose. The noise contributingto the variance for the incorrect hypothesis (21) is then1024R₂+2R_(p)R₂+R₂ ²+I₂ ²+2I_(p)I₂. Now the variance for these two termscan be calculated to be 5*1024²β+12β² for (20) and 1024²β+12β² for (21).Now comparing the two variances for the correct hypothesis for twomethods: 1024²β+4β₂ (conv) vs 5*1024²β+12β² (JPH). It's clear that thatthe variance increases only between 3 to 5 times. Now compare the twovariances for the incorrect hypothesis for the two methods: 4β² (conv)vs 1024²β+12β² (JPH). To reach more than a factor of 9 increase here,β≦43690.7. This means Ec/(Io-Ec)≧−19 dB. Note for such Ec/(Io-Ec), thedetection probability is approximately 1 for both methods shown inFIG. 1. Even at this range, due to the only factor of 3 to 5 increase inthe correct hypothesis variance, the JPH method still performs better.

It is also useful to study the false alarm performance. It is believedthat JPH will always have a better performance in terms of false alarmthan the conventional method by observing the SNR after the correlation.

Equation (1) can be modified to include the false alarm case. It is onlystudied for one bpg and assumed to have only one SSC.

$y = \{ \begin{matrix}{{{{\alpha ( {{P\; S\; C} + {S\; S\; C}} )}^{j\varphi}} + n},} & H_{1} \\{n,} & H_{0}\end{matrix} $

H₀ and H₁ are the hypotheses without signal and with signal. Now definethe correlation output for conventional and JPH method as

Z _(conv)=SSCy*=∥SSC∥² e ^(jφ)+SSCn*

Z _(JPH−1)=(PSC+SSC)y*=(∥PSC∥²+∥SSC∥²)e ^(jφ)+SSCn*+PSCn*

Now the SNR for Z_(conv) is ∥SSC∥²/σ²=512/σ² but the SNR for Z_(JPH−1)is (∥SSC∥²+∥PSC∥²)²/(∥SSC∥²+∥PSC∥²)σ²=1024/σ². JPH method doubles theSNR, thus giving better false alarm performance.

The information and signals may be represented using any of a variety ofdifferent technologies and techniques. For example, data, instructions,commands, information, signals, bits, symbols, and chips that may bereferenced throughout the above description may be represented byvoltages, currents, electromagnetic waves, magnetic fields or particles,optical fields or particles, or any combination thereof.

Further, it will be appreciated that the various illustrative logicalblocks, modules, circuits, and algorithm steps described in connectionwith the embodiments disclosed herein may be implemented as electronichardware, computer software, or combinations of both. To clearlyillustrate this interchangeability of hardware and software, variousillustrative components, blocks, modules, circuits, and steps have beendescribed above generally in terms of their functionality. Whether suchfunctionality is implemented as hardware or software depends upon theparticular application and design constraints imposed on the overallsystem. The described functionality may be implemented in varying waysfor each particular application, but such implementation decisionsshould not be interpreted as causing a departure from the scope of thepresent invention.

The methods, sequences and/or algorithms described in connection withthe embodiments disclosed herein may be embodied directly in hardware,in a software module executed by a processor, or in a combination of thetwo. A software module may reside in RAM memory, flash memory, ROMmemory, EPROM memory, EEPROM memory, registers, hard disk, a removabledisk, a CD-ROM, or any other form of storage medium known in the art. Anexemplary storage medium is coupled to the processor such that theprocessor can read information from, and write information to, thestorage medium. In the alternative, the storage medium may be integralto the processor.

Accordingly, an embodiment of the invention can include a computerreadable media embodying a method for performing the step 2 searchalgorithm. Accordingly, the invention is not limited to illustratedexamples and any means for performing the functionality described hereinare included in embodiments of the invention.

While the foregoing disclosure shows illustrative embodiments of theinvention, it should be noted that various changes and modificationscould be made herein without departing from the scope of the inventionas defined by the appended claims. The functions, steps and/or actionsof the method claims in accordance with the embodiments of the inventiondescribed herein need not be performed in any particular order.Furthermore, although elements of the invention may be described orclaimed in the singular, the plural is contemplated unless limitation tothe singular is explicitly stated.

1. A method for searching for a secondary synchronization code, themethod comprising: correlating both a primary synchronization channeland a secondary synchronization channel; obtaining a first estimate thatis a function of the primary synchronization channel and secondarysynchronization channel, for a correct secondary synchronization code;and obtaining a second estimate that is a function of the primarysynchronization channel for an incorrect secondary synchronization code.2. The method according to claim 1, wherein the first estimate is givenas:E|(PSC+SSC_(k,i))y _(k)*|²=α_(k)²(∥PSC∥²+∥SSC_(k,i)|²)²+(∥PSC∥²+∥SSC_(k,i)∥²)σ²
 3. The method accordingto claim 1, wherein the second estimate is given as:E|(PSC+SSC_(k,i))y _(k)*|²=α_(k) ²(∥PSC∥²)²+(∥PSC∥²)σ².
 4. The methodaccording to claim 1, wherein the first estimate is proportional to ansquare of the norm of the sum of the primary synchronization channel andthe secondary synchronization channel multiplied by a conjugate of thereceived signal.
 5. The method according to claim 1, wherein the secondsynchronization code is one of sixteen possible codes in a CDMA system.6. The method according to claim 1, wherein the primary and secondarysynchronization channels are divided into a plurality of slots, and apredetermined number of slots comprise a frame, and wherein thesecondary synchronization code is determined after a search ofpredetermined number of slots.
 7. A circuit for performing a search ofthe synchronization channels in a WCDMA system, including at least aprimary synchronization channel and a secondary synchronization channel,comprising: a correlator to perform the correlation of I and Q signalswith primary synchronization codes and secondary synchronization codes;an energy calculator responsive to the output of the correlator; and amaximum energy detector, responsive to the energy calculator, fordetecting the most likely scrambling code group of secondarysynchronization codes.
 8. The circuit according to claim 7, wherein thecorrelator is a hybrid adder-correlator which includes: a firstcorrelator for correlating I and Q signals with the primarysynchronization codes; a second correlator for correlating I and Qsignals with the secondary synchronization codes; and a first adder foradding the correlated signals I and Q signals from the first correlatorand the second correlator, for each of the secondary synchronizationcodes.
 9. The circuit according to claim 7, wherein the correlatorincludes: a first correlator for correlating I and Q signals with aprimary synchronization code; and a second correlator for correlating Iand Q signals with a secondary synchronization code.
 10. The circuitaccording to claim 8, wherein the energy calculator includes a firstsquaring circuit and a second squaring circuit for squaring the I and Qoutputs from the first adder, and a second adder for adding the outputsof the first and second squaring circuits.
 11. The circuit according toclaim 10, wherein the outputs of the second adder are stored in amemory.
 12. The circuit according to claim 8, wherein a Fast HadamardTransformation is performed on the output of the second correlator. 13.The circuit according to claim 12, wherein the output of the secondcorrelator is despread prior to the Fast Hadamard Transformation. 14.The circuit according to claim 7, wherein the circuit solves thealgorithm defined by the equation:Hi=arg maxΣ|(PSC+SSC_(k,i))y _(k)*|²
 15. The circuit according to claim7, wherein the primary and secondary synchronization channels aredivided into a plurality of slots, and a predetermined number of slotscomprise a frame, and wherein the circuit is able to determine secondarysynchronization code after a search of predetermined number of slots 16.The circuit according to claim 7, wherein the circuit is an integratedcircuit.
 17. A mobile terminal in a WCDMA system, comprising: an RFdownconverter for receiving I and Q signals; a searcher, responsive tothe I and Q signals, including: a first correlator for correlating I andQ signals with a primary synchronization code; a second correlator forcorrelating I and Q signals with a secondary synchronization code; afirst adder for adding the correlated signals I and Q signals from thefirst correlator and the second correlator, for each of the secondarysynchronization codes; an energy calculator responsive to the output ofthe first adder; and a maximum energy detector, responsive to the energycalculator, for detecting the most likely scrambling code group ofsecondary synchronization codes.
 18. The mobile terminal of claim 17,wherein at least a portion of the searcher is implemented in a DSP. 19.A circuit for performing a search of the synchronization channels in aWCDMA system, including at least a primary synchronization channel and asecondary synchronization channel, comprising: correlator means forperforming the correlation of I and Q signals with the primarysynchronization code and the secondary synchronization code; means forperforming an energy calculation in response to the output of thecorrelator means; and means for detecting the maximum energy in order todetermine the most likely scrambling code group of secondarysynchronization codes.
 20. The circuit according to claim 19 wherein thecorrelator means includes hybrid adder-correlator means having: firstmeans for correlating I and Q signals with a primary synchronizationcode; second means for correlating I and Q signals with a secondarysynchronization code; and first means for adding the correlated signalsI and Q signals from the first means for correlating and the secondmeans for correlating, for each of the secondary synchronization codes.21. The circuit according to claim 19, wherein the means for performingthe energy calculation includes a first squaring means and a secondsquaring means for squaring the I and Q outputs from the first addingmeans, and a second adding means for adding the outputs of the first andsecond squaring means.
 22. The circuit according to claim 21, whereinthe outputs of the second adding means are stored in a memory.
 23. Thecircuit according to claim 22, wherein a Fast Hadamard Transformation isperformed on the output of the second correlating means.
 24. The circuitaccording to claim 20, wherein the output of the second means forcorrelating is despread prior to the Fast Hadamard Transformation. 25.The circuit according to claim 19, wherein the correlator meansincludes: first means for correlating I and Q signals with a primarysynchronization code; and second means for correlating I and Q signalswith a secondary synchronization code.
 26. A circuit for performing asearch of the synchronization channels in a WCDMA system, including atleast a primary synchronization channel and a secondary synchronizationchannel, comprising: means for adding primary synchronization code andsecondary synchronization code inputs; correlator means for performingthe correlation of I and Q signals with the added primarysynchronization code and the secondary synchronization code inputs;means for performing an energy calculation in response to the output ofthe correlator means; and means for detecting the maximum energy inorder to determine the most likely scrambling code group of secondarysynchronization codes.